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tisppbl3 dual forward-conducting p-gate thyristors for ericsson microelectronics slics product information 1 october 2000 ? revised february 2001 copyright ? 2001, power innovations limited, uk information is current as of publication date. products conform to specifications in accordance with the terms of power innovations standard warranty. production processing does not necessarily include testing of all parameters. programmable overvoltage protection for ericsson microelectronics subscriber line interface circuits, slics a bourns company l overvoltage protection for listed slics:- l rated for international surge wave shapes slic ? tisppbl3 pbl3762a/2 pbl3762a/4 pbl3764a/4 pbl3764a/6 pbl3766 pbl3766/6 pbl3767 pbl3767/6 pbl3860a/1 pbl3860a/6 pbl38610/2 pbl38611/2 pbl38614/2 pbl38615/2 pbl38620/2 pbl38621/2 pbl38630/2 pbl38640/2 pbl38650/2 pbl38661/2 pbl38665/2 pbl38710/1 see applications information for earlier slic types. wave shape standard i tsp a 2/10s gr-1089-core 100 10/700s itu-t k.20, k.21, k.45 40 10/1000s gr-1089-core 30 l high voltage capability supports battery voltages down to -150 v l specified 2/10 impulse limiting voltage - voltage-time envelope guaranteed - full -40c to 85c temperature range l feed-through package connections - minimises inductive wiring voltages. description the tisppbl3 is a dual forward-conducting buffered p-gate overvoltage protector. it is designed to protect the ericsson microelectronics slics (subscriber line interface circuits) against overvoltages on the telephone line caused by lightning, a.c. power contact and induction. the tisppbl3 limits voltages that exceed the referenced slic supply rail levels. how to order device package carrier order as tisppbl3 d (8-pin small-outline) embossed tape reeled TISPPBL3DR device symbol sd6xaea k1 k2 a a g1,g2 k1 k2 terminals k1, k2 and a correspond to the alternative line designators of t, r and g or a, b and c. the negative protection voltage is controlled by the voltage, v gg, applied to the g terminal. md6xana d package (top view) nc - no internal connection terminal typical application names shown in parenthesis 1 2 3 4 5 6 7 8 k1 a a k2 g k1 k2 nc (tip) (ground) (ground) (ring) (gate) (tip) (ring) ? customers are advised to obtain the latest version of the relevant ericsson microelectronics slic information to verify, befor e placing orders, that the information being relied on is current.
tisppbl3 dual forward-conducting p-gate thyristors for ericsson microelectronics slics 2 october 2000 ? revised february 2001 product information the slic line driver section is typically powered by a negative voltage, v bat , in the region of -10v to -90v. the protector gate is connected to this negative supply. this references the protection (clipping) voltage to the negative supply voltage. as the protection voltage will track the negative supply voltage the overvoltage stress on the slic is minimised. the tisppbl3 buffered gate design reduces the loading on the slic supply during overvoltages caused by power cross and induction. positive overvoltages are clipped to ground by diode forward conduction. negative overvoltages are initially clipped close to the slic negative supply rail value. if sufficient current is available from the overvoltage, then the protector will crowbar into a low voltage ground referenced on-state condition. as the overvoltage subsides the high holding current of the crowbar prevents d.c. latchup. these monolithic protection devices are fabricated in ion-implanted planar vertical power structures for high reliability and in normal system operation they are virtually transparent. the tisppbl3 has an 8-pin plastic small-outline surface mount package, d suffix, and is a universal substitute for tisppbl1d and tisppbl2d devices. absolute maximum ratings, -40c t a 85c (unless otherwise noted) rating symbol value unit repetitive peak off-state voltage, v gk =0, -40c t j 85c v drm -170 v repetitive peak gate-cathode voltage, v ka =0, -40c t j 85c v gkrm -160 v non-repetitive peak on-state pulse current(see notes 1 and 2) i tsp a 10/1000s(bellcore gr-1089-core, issue 2, december 1997, revision 1, section 4) 30 5/310s(itu-t k.20, k.21 & k.45, open-circuit voltage wave shape 10/700s) 40 2/10s(bellcore gr-1089-core, issue 2, december 1997, revision 1, section 4) 100 non-repetitive peak on-state current, 50/60 hz, t a =25c (see notes 2 and 3) i tsm a 100ms 10 1s 5s 300s 900s 4.4 2.1 0.64 0.60 non-repetitive peak gate current, 1/2spulse, cathodes commoned(see note 1) i gsm 40 a operating free-air temperature range t a -40 to +85 c junction temperature t j -40 to +150 c storage temperature range t stg -65 to +150 c notes: 1. initially the protector must be in thermal equilibrium with -40c t j 85c. the surge may be repeated after the device returns to its initial conditions. above 85c, derate linearly to zero at 150c lead temperature. 2. these non-repetitive rated currents are peak values for either polarity. the rated current values may be applied either to the r ing to ground or to the tip to ground terminal pairs. additionally, both terminal pairs may have their rated current values applied simultaneously (in this case the ground terminal current will be twice the rated current value of an individual terminal pair). 3. values for v gg = -120v. for values at other voltages see figure 4. above 25c, derate linearly to zero at 150c lead temperature. recommended operating conditions see figure 10 min typ max unit c1 gate decoupling capacitor 100 220 nf r 1a r1b series resistance for gr-1089-core first-level and second-level surge survival series resistance for gr-1089-core first-level surge survival series resistance for itu-t recommendation k.20, k.21 and k.45 40 25 10 w
3 october 2000 ? revised february 2001 tisppbl3 dual forward-conducting p-gate thyristors for ericsson microelectronics slics product information electrical characteristics, -40c t a 85c (unless otherwise noted) parameter test conditions min typ max unit i d off-state current v d = v drm , v gk =0 t j =-40c -5 a t j =85c -50 a v (bo) breakover voltage i t =-100a, 2/10 generator, figure 3 test circuit (see figure 2) -120 v t (br) breakdown time i t =-100a, 2/10 generator, figure 3 test circuit (see figure 2) v (br) < -100v 1 s v f forward voltage i f =5a, t w =500s 3 v v frm peak forward recovery voltage i f =100a, 2/10 generator, figure 3 test circuit (see figure 2) 8 v t fr forward recovery time i f =100a, 2/10 generator, figure 3 test circuit (see figure 2) v f > 5v v f > 1v 1 10000 s i h holding current i t =-1a, di/dt = 1a/ms, v gg =-50v, -150 ma i gks gate reverse current v gg = v gk = v gkrm , v ka =0 t j =-40c -5 a t j =85c -50 a i gat gate reverse current, on state i t =-0.5a, t w =500s, v gg =-50v, t a =25c -1 ma i gaf gate reverse current, forward conducting state i f =1a, t w =500s, v gg =-50v, t a =25c -10 ma i gt gate trigger current i t =-5a, t p(g) 3 20s, v gg =-50v, t a =25c 5 ma v gt gate trigger voltage i t =-5a, t p(g) 3 20s, v gg =-50v, t a =25c 2.5 v c ak anode-cathode off- state capacitance f=1mhz, v d =1v, i g =0, t a =25c (see note 4) v d =-3v 110 pf v d =-50v 60 pf note 4: these capacitance measurements employ a three terminal capacitance bridge incorporating a guard circuit. the unmeasured device terminals are a.c. connected to the guard terminal of the bridge. thermal characteristics parameter test conditions min typ max unit r q ja junction to free air thermal resistance p tot =0.8w,t a =25c, 5cm 2 , fr4 pcb 160 c/w
tisppbl3 dual forward-conducting p-gate thyristors for ericsson microelectronics slics 4 october 2000 ? revised february 2001 product information parameter measurement information figure 1 principal terminal and gate transfer characteristics figure 2 transient limits for tisppbl3 2/10 impulse limiting voltage pm6xaib -v i s v s v gg (circuit v b ) v d i h i t v t i tsm i tsp v (bo) i (bo) i d quadrant i forward conduction characteristic +v +i i f v f i fsm (= | i tsm | ) i fsp (= | i tsp | ) -i quadrant iii switching characteristic v gk(bo) principal terminal v-i characteristic i gt i gat i gaf i f +i k -i k i t -i g +i g gate transfer characteristic i k i g protector maximum limiting voltage vs time 0 5 10 1 s v gg = v b = -50 v 10 ms 1 s v o l t a g e - v time pm6xalb max v frm = 8 v max v (bo) = -70 v -50 -60 -70 -80
5 october 2000 ? revised february 2001 tisppbl3 dual forward-conducting p-gate thyristors for ericsson microelectronics slics product information thermal information parameter measurement information figure 3 test circuit for measurement of limiting voltage figure 4 r1 40 w w hi v b (v gg ) -50 v ai6xbacc impulse current i t , i f limiting voltage v k , v f lo dut (tisppbl3) 220 nf r1 = one section of a bourns 4b04b-cs0-400 thick-film high voltage pulse resistor network ecat with e505 2/10 output network i g th4 th5 peak non-recurring ac vs current duration t ? current duration ? s 0.01 0.1 1 10 100 1000 i t s m ? p e a k n o n - r e c u r r e n t 5 0 h z c u r r e n t ? a 0.5 0.6 0.7 0.8 1.5 2 3 4 5 6 7 8 15 20 1 10 v gg = -60 v v gg = -80 v v gg = -100 v v gg = -120 v ring and tip terminals: equal i tsm values applied simultaneously ground terminal: current twice i tsm value eia /jesd51 environment and pcb, t a = 25 c ti61af
tisppbl3 dual forward-conducting p-gate thyristors for ericsson microelectronics slics 6 october 2000 ? revised february 2001 product information applications information operation of gated protectors the following slic circuit definitions are used in this data sheet: v bat ? package pin label for the battery supply voltage. v bat ? voltage applied to the v bat pin. v b ? negative power supply voltage applied to the v bat pin via an isolation diode. this voltage is also the gate reference voltage, v gg , of the tisppbl3. when the isolation diode, d1, is conducting, then v bat =v b +0.7. the isolation diode, d1 in figure 5, is to prevent a damaging current flowing into the slic substrate (v bat pin) if the v bat voltage becomes more negative than the v b supply during a negative overvoltage condition. each slic must have its own isolation diode from the v b voltage supply. (maytum, m j, enoksson, j & rutgers, k, coordination of overvoltage protection and slic capability, international ic - china conference proceedings 2000, pp. 87 - 97) figure 5 and figure 6 show how the tisppbl3 limits overvoltages. the tisppbl3 thyristor sections limit negative overvoltages and the diode sections limit positive overvoltages. negative overvoltages (figure 5) are initially clipped close to the slic negative supply rail value (v b ) by the conduction of the transistor base-emitter and the thyristor gate-cathode junctions. if sufficient current is available from the overvoltage, then the thyristor will crowbar into a low voltage ground referenced on-state condition. as the overvoltage subsides the high holding current of the crowbar thyristor prevents d.c. latchup. the negative protection voltage will be the sum of the gate supply (v b ) and the peak gate(terminal)-cathode voltage (v gk(bo) ). under a.c. overvoltage conditions v gk(bo) will be less than 3v. the integrated transistor buffer in the tisppbl3 greatly reduces the gate positive current (from about 50ma to 1ma) and introduces a negative gate current. figure 1 shows that the tisppbl3 gate current depends on the current being conducted by the principal terminals. the gate current is positive during clipping (charging the v b supply) and negative when the thyristor is on or the diode is conducting (loading the v b supply). without the negative gate current and the reduced level of positive gate current the v b supply could be charged with a current of nearly 100ma. as the v b supply is likely to be electronic it would not be designed to be charged like a battery. as a figure 5 negative overvoltage condition figure 6 positive overvoltage condition ai6xanb slic slic protection tisp pblx c1 v b c2 d1 v bat th4 th5 i t i f ai6xaob slic slic protection tisp pblx c1 v b c2 d1 v bat th4 th5
7 october 2000 ? revised february 2001 tisppbl3 dual forward-conducting p-gate thyristors for ericsson microelectronics slics product information result, the slic could be destroyed by the voltage of v b increasing to a level that exceeded the slic?s capability on the v bat pin. the integrated transistor buffer removes this problem. fast rising impulses will cause short term overshoots in gate-cathode voltage. the negative protection voltage under impulse conditions will also be increased if there is a long connection between the gate decoupling capacitor, c1, and the gate terminal. during the initial rise of a fast impulse, the gate current (i g ) is the same as the cathode current (i k ). rates of 60a/s can cause inductive voltages of 0.6v in 2.5cm of printed wiring track. to minimise this inductive voltage increase of protection voltage, the length of the capacitor to gate terminal tracking should be minimised. inductive voltages in the protector cathode wiring can increase the protection voltage. these voltages can be minimised by routing the slic connection through the protector as shown in figure 5 and figure 6. positive overvoltages (figure 6) are clipped to ground by forward conduction of the diode section in the tisppbl3. fast rising impulses will cause short term overshoots in forward voltage (v frm ). tisppbl3 limiting voltages figure 3 shows the basic test circuit used for the measurement of impulse limiting voltage. during the impulse, the high levels of electrical energy and rapid rates of change cause electrical noise to be induced or conducted into the measurement system. it is possible for the electrical noise voltage to be many times the wanted signal voltage. elaborate wiring and measurement techniques were used to reduce the noise voltage to less than 2v peak to peak. a keytek ecat e-class series 100 with an e505 surge network was used for testing. the e505 produces a 2/10 voltage impulse. this particular waveform was used as it has the fastest rate of current rise (di/dt) of the rated lightning surge waveforms. this maximises the measured limiting voltage. initially the 2/10 wavefront current rises at 60a/s, this rate then reduces as the peak current is approached. a large number of devices from different production runs were measured in the test circuit of figure 3 over the rated temperature range. statistical techniques were used to estimate the population 99.997% level (equal to 30 ppm) performance limits. slic protection requirements this clause discusses the voltage withstand capabilities of the various ericsson microelectronics slic groups and compares these to the tisppbl3 protector parameters. the examples provided are intended to provide designers information on how the tisppbl3 protector and specific slics work together. designers should always follow the circuit design recommendations contained in the latest edition of a slic data sheet. temperature range some slics are rated for 0c to 70c operation, others for -40c to 85c operation. the tisppbl3 protector is specified for -40c to 85c operation and so covers both temperature ranges. normal operation depending on the slic type, the maximum slic supply voltage rating (v bat ) will be -70v, -80v or -85v. the -160v rating of the tisppbl3 gate-cathode (v gkrm ) exceeds the highest slic voltage rating. to restore normal operation after the tisppbl3 has switched on, the minimum switch-off current (holding current i h ) needed is equal to the maximum slic short circuit current to ground (d.c. line current together with the maximum longitudinal current).
tisppbl3 dual forward-conducting p-gate thyristors for ericsson microelectronics slics 8 october 2000 ? revised february 2001 product information maximum tipx and ringx terminal ratings the withstand levels of a slic line drive amplifier tipx and ringx can be expressed in terms of maximum voltage for certain time periods. the negative voltage rating can be specified in two ways; relative to ground or relative to the slic negative supply voltage (v bat ). the tipx or ringx voltage withstand levels for the current range of ericsson slics falls into three groups, see figure 7. the first group, headed by the pbl 3762a/2 slic, has a positive polarity d.c. withstand of +2v. for 10ms, the output can withstand a voltage of +5v. for 1s, the output can withstand a voltage of +10v. for 250ns, the output is able to withstand a voltage of +15v. in the negative polarity, the output can withstand v bat continuously. for 10ms, the output can withstand a voltage of v bat -20v. for 1s, the output can withstand a voltage of v bat -40v. for 250ns, the output is able to withstand a voltage of v bat -70v. the second group, headed by the pbl 3766 slic, has a positive polarity d.c. withstand of +0.5 v. for 10ms, 1s and 250ns the withstand voltage is the same as the pbl 3762a/2 group. in the negative polarity the withstand voltage of the pbl 3766 group is the same as the pbl 3762a/2 group. the third group, headed by the pbl 386 20/2 slic, has the same positive polarity withstand as the pbl3762a/2 group. in the negative polarity, the output can withstand -80v continuously. for 10ms, the output can withstand a voltage of v bat -10v. for 1s, the output can withstand a voltage of v bat -25v. for 250ns, the output is able to withstand a voltage of v bat -35v. protection requirements to cover all slics to protect all slics, the tisppbl3 protector must limit the voltage to the lowest withstand levels of the three slic groups shown in figure 7. figure 8 shows that this will be the positive polarity rating of the pbl 3766 group and the negative rating of the pbl 386 20/2 group. . tisppbl3 voltage limiting performance figure 9 shows how the tisppbl3 protection voltages compare to the minimum voltage withstands of figure 8. the two shaded areas represent the positive and negative maximum limiting voltage levels of the tisppbl3 from figure 2. the isolation diode voltage drop displaces the tisppbl3 negative limiting voltage 1s, -20v pulse area by -0.7 v from v bat . so the actual negative limiting voltage is -20.7v relative to v bat . this value does not exceed any part of the slic minimum negative voltage ratings. any negative voltage disturbance in the v b supply caused by tisppbl3 gate current will be tracked in v bat by conduction of the isolation diode d1. so a negative going change in v b does not substantially increase the tipx and ringx voltage stress relative to v bat . however, the absolute value of v bat with respect to ground must be kept within the data sheet rating. in the positive polarity the tisppbl3 limits the maximum voltage to 8v in a 1s period and between 1v and 5v for a 10ms period. these values do not exceed any of the slic minimum positive voltage ratings. application circuit figure 10 shows a typical tisppbl3 slic card protection circuit. the incoming line conductors, r and t, connect to the relay matrix via the series over-current protection. fusible resistors, fuses and positive temperature coefficient (ptc) resistors can be used for over-current protection. normally, the slic reference designs recommend using 40 w matched fusible resistors, such as the bourns 2% tolerance, 1% matched 4b04b-cs0-400. resistors will reduce the prospective current from the surge generator for both the tisppbl3 and the ring/test protector. the tisp7xxxf3 protector has the same protection voltage for any terminal pair. this protector is used when the ring generator configuration may be ground or battery-backed. for dedicated ground-backed ringing generators, the tisp3xxxf3 gives better protection as its inter- conductor protection voltage is twice the conductor to ground value.
9 october 2000 ? revised february 2001 tisppbl3 dual forward-conducting p-gate thyristors for ericsson microelectronics slics product information relay contacts 3a and 3b connect the line conductors to the slic via the tisppbl3 protector. closing contacts 3a and 3b connects the tisppbl3 protector in parallel with the ring/test protector. as the ring/test part number maximum voltage ratings pbl 3762a/2 pbl 3762a/4 pbl 3764a/4 pbl 3764a/6 pbl 3860a/1 pbl 3860a/6 pbl 386 10/2 pbl 386 11/2 pbl 386 14/2 pbl 386 15/2 pbl 386 61/2 pbl 386 65/2 pbl 387 10/1 d.c. v bat & +2 v, < 10 ms v bat -20 v & +5 v, < 1 s v bat -40 v & +10 v, < 250 ns v bat -70 v & +15 v pbl 3766 pbl 3766/6 pbl 3767 pbl 3767/6 d.c. v bat & +0.5 v, < 10 ms v bat -20 v & +5 v, < 1 s v bat -40 v & +10 v, < 250 ns v bat -70 v & +15 v pbl 386 20/2 pbl 386 21/2 pbl 386 30/2 pbl 386 40/2 pbl 386 50/2 d.c. -80 v & +2 v, < 10 ms v bat -10 v & +5 v, < 1 s v bat -25 v & +10 v, < 250 ns v bat -35 v & +15 v figure 7 tipx and ringx rated values tipx or ringx voltage rating vs time (negative rating relative to v bat ) 0 5 10 15 ai6xdbaa t i p x o r r i n g x v o l t a g e - v v bat - 70 v bat - 60 v bat - 50 v bat - 40 v bat - 30 v bat - 20 v bat - 10 v bat 0.25 s 1 s 10 ms time tipx or ringx voltage rating vs time (negative rating relative to v bat ) 0 5 10 15 ai6xdbab t i p x o r r i n g x v o l t a g e - v v bat - 70 v bat - 60 v bat - 50 v bat - 40 v bat - 30 v bat - 20 v bat - 10 v bat 0.25 s 1 s 10 ms time tipx or ringx voltage rating vs time (negative impulse rating relative to v bat ) 0 5 10 15 ai6xdbac v bat - 40 v bat - 30 v bat - 20 v bat - 10 v bat 0.25 s 1 s 10 ms time t i p x o r r i n g x v o l t a g e - v - 80 v
tisppbl3 dual forward-conducting p-gate thyristors for ericsson microelectronics slics 10 october 2000 ? revised february 2001 product information protector requires much higher voltages than the tisppbl3 to operate, it will only operate when the contacts 3a and 3b are open. both protectors will divert the same levels of peak surge current and their required current ratings should be similar. the tisppbl3 protector gate reference voltage comes from the slic negative supply feed (v b ). a local gate capacitor, c1, sources the gate current pulses caused by fast rising impulses. figure 8 slic voltage ratings time ai6xbdd v o l t a g e - v v bat - 70 v bat - 60 v bat - 50 v bat - 40 v bat - 30 v bat - 20 v bat - 10 v bat slic group voltage ratings vs time 0 10 20 30 40 pbl 386 20/2 group pbl3762a/2 and pbl3766 groups 1 s 0.25 s pbl3762a/2 and pbl386 20/2 groups pbl 3766 group 10 ms
11 october 2000 ? revised february 2001 tisppbl3 dual forward-conducting p-gate thyristors for ericsson microelectronics slics product information figure 10 typical application circuit test relay ring relay slic relay test equip- ment ring generator s1a s1b r1a r1b r wire t wire th1 th2 th3 slic slic protection ring/test protection series resistance s2a s2b tisp pblx tisp 3xxxf3 or 7xxxf3 s3a s3b ai6xapea c1 v b c2 d1 v bat th4 th5 (includes over- current protection)
tisppbl3 dual forward-conducting p-gate thyristors for ericsson microelectronics slics 12 october 2000 ? revised february 2001 product information earlier protection recommendations the table below lists the protection recommendations from earlier versions of the tisppbl1 and tisppbl2 data sheets. the tisppbl3d is a functional replacement for the tisppbl1d and the tisppbl2d. slic tisppbl1 tisppbl2 pbl3796 <55ma? pbl3796/2 <55ma? pbl3798 <55ma? pbl3798/2 <55ma? pbl3798/5 <55ma? pbl3798/6 pbl3799 ? pbl3799/2 ? pbl38620/1 ? pbl38621/1 ? pbl38630/1 ? pbl38640/1 ? pbl38650/1 ? ? product change notification 109 21-pbl 386 xx/1-1 uen of 06-06-1999 improved the silicon design of the pbl 386 20/1, pbl 386 21/1, pbl 386 30/1, pbl 386 40/1 and pbl 386 50/1. these improved devices are designated by a /2 as pbl 386 20/2, pbl 386 21/2, pbl 386 30/2, pbl 386 40/2 and pbl 386 50/2 respectively. ? use tisppbl2 when programmed line current is above 55ma
13 october 2000 ? revised february 2001 tisppbl3 dual forward-conducting p-gate thyristors for ericsson microelectronics slics product information mechanical data device symbolization code devices will be coded as below. device symbolization code tisppbl3 sppbl3
tisppbl3 dual forward-conducting p-gate thyristors for ericsson microelectronics slics 14 october 2000 ? revised february 2001 product information mechanical data d008 plastic small-outline package this small-outline package consists of a circuit mounted on a lead frame and encapsulated within a plastic compound. the compound will withstand soldering temperature with no deformation, and circuit performance characteristics will remain stable when operated in high humidity conditions. leads require no additional cleaning or processing when used in soldered assembly. 5,21 (0.205) 4,60 (0.181) notes: a. leads are within 0,25 (0.010) radius of true position at maximum material condition. b. body dimensions do not include mold flash or protrusion. c. mold flash or protrusion shall not exceed 0,15 (0.006). d. lead tips to be planar within 0,051 (0.002). 1,75 (0.069) 1,35 (0.053) 6,20 (0.244) 5,80 (0.228) 5,00 (0.197) 4,80 (0.189) d008 8 7 6 5 4 3 2 1 4,00 (0.157) 3,81 (0.150) 7 nom 3 places 7 nom 4 places 0,51 (0.020) 0,36 (0.014) 8 places pin spacing 1,27 (0.050) (see note a) 6 places 1,12 (0.044) 0,51 (0.020) 4 4 0,79 (0.031) 0,28 (0.011) 0,203 (0.008) 0,102 (0.004) all linear dimensions are in millimeters and parenthetically in inches 8-pin small outline microelectronic standard package ms-012, jedec publication 95 0,50 (0.020) 0,25 (0.010) x 45nom 0,229 (0.0090) 0,190 (0.0075) mdxxaac index
15 october 2000 ? revised february 2001 tisppbl3 dual forward-conducting p-gate thyristors for ericsson microelectronics slics product information mechanical data d008 tape dimensions d008 package (8-pin small outline) single-sprocket tape all linear dimensions in millimeters 6,30 6,50 11,70 12,30 5,40 5,60 1,50 1,60 3,90 4,10 7,90 8,10 1,95 2,05 0,8 min. 0 min. 0,40 2,0 2,2 direction of feed ? 1,5 min. carrier tape embossment cover tape notes: a. taped devices are supplied on a reel of the following dimensions:- reel diameter: 330 +0,0/-4,0 mm reel hub diameter: 100 2,0 mm reel axial hole: 13,0 0,2 mm b. 2500 devices are on a reel. mdxxatb
tisppbl3 dual forward-conducting p-gate thyristors for ericsson microelectronics slics 16 october 2000 ? revised february 2001 product information important notice power innovations limited (pi) reserves the right to make changes to its products or to discontinue any semiconductor product or service without notice, and advises its customers to verify, before placing orders, that the information being relied on is current. pi warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with pi's standard warranty. testing and other quality control techniques are utilised to the extent pi deems necessary to support th is warranty. specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements. pi assumes no liability for applications assistance, customer product design, software performance, or infringement of patents or services described herein. nor is any license, either express or implied, granted under any patent right, copyright, design right, or other intellectual property right of pi covering or relating to any combination, machine, or process in which such semiconductor products or services might be or are used. pi semiconductor products are not designed, intended, authorised, or warranted to be suitable for use in life-support applications, devices or systems. copyright ? 2001, power innovations limited

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